DFT Engineer

Delos Data Inc · Remote · Palo Alto ·
Fully remoteFull-timeMiddle3–5 years
COMPENSATION
€•• – ••k
0 applicants so far

Listed on the employer's job board (Ashby)

  • Senior level role
  • Hybrid US/Canada
  • SystemVerilog + UVM
  • DFT verification focus
  • $180k-$260k base

Join a Silicon Valley-backed startup building technology for large-scale AI data center clusters. As a Senior DFT Verification Engineer, you will ensure the correctness of ASIC DFT logic by building robust verification environments and executing coverage-driven plans. You will collaborate with design and manufacturing teams to deliver high-quality silicon.

What you'll do

  • Develop and maintain RTL verification environments using UVM
  • Create and execute coverage-driven verification plans
  • Use EDA DFT tools to run pre-silicon test cases for MBIST and scan
  • Develop directed test cases for non-vendor DFT logic
  • Verify ATPG patterns and manufacturing reset sequences at SOC level
  • Debug complex verification issues and perform root-cause analysis
  • Implement functional and code coverage to drive verification closure
  • Write SystemVerilog Assertions and reusable verification components
  • Automate regression testing using Python and scripting
  • Support post-silicon test bring-up debug with DFT designers

What you'll need

  • Bachelor’s or Master’s in Electrical or Computer Engineering
  • 5+ years in digital design verification, 2+ in DFT verification
  • Strong hands-on experience with UVM or similar methodologies
  • Proficiency in SystemVerilog
  • Experience with scripting and automation, preferably Python
  • Knowledge of EDA tools like VCS, Questa, or Xcelium
  • Experience with DFT tools such as TestMax or Tessent
  • Understanding of digital design fundamentals
  • Experience verifying test sequences for PCIe and Ethernet PHYs
  • Strong analytical, problem-solving, and communication skills

Nice to have

  • Experience with git change control systems
  • Experience verifying SoC-level designs

Stack

  • SystemVerilog
  • UVM
  • Python
  • TestMax
  • Tessent
  • VCS
  • Questa
  • Xcelium
  • Git

How you'll work

  • Hybrid remote and on-site work model
  • Locations in the U.S. and Canada
  • Headquartered in Silicon Valley

What you get

  • Base salary between $180,000 and $260,000
  • Meaningful equity package
  • Health and welfare benefits
  • 401(k) plan