Wireless Design Verification Engineer
Apple Inc. · San Francisco, CA, United States ·
COMPENSATION
€•• – ••k
Listed on WeAreDevelopers
- Pre-silicon RTL verification
- SystemVerilog + UVM
- Wireless MAC focus
- Python + Perl scripting
- FPGA validation
This role focuses on pre-silicon RTL verification for wireless MAC components and their integration with the broader wireless System on Chip. You will collaborate with design and systems engineers to build robust verification environments that ensure high design quality through advanced methodologies.
What you'll do
- Perform pre-silicon RTL verification of wireless MAC and SoC interfaces
- Develop reusable testbenches and verification environments
- Apply metric-driven verification to ensure design quality
- Collaborate with DV methodologists, designers, and systems engineers
What you'll need
- Bachelor's degree is required
- Advanced knowledge of Verilog, SystemVerilog, and UVM
- Experience with SystemVerilog Assertions
- Proficiency in ASIC verification flows and constrained random testing
- Strong skills in shell, Python, and Perl scripting
Nice to have
- 3+ years verifying wireless or wired communication blocks
- Experience with MAC, PHY, DMA, timers, or AMBA bus
- Knowledge of Bluetooth, UWB, WLAN, or Zigbee protocols
- Experience using AI for data mining or analysis
- Background in Palladium or FPGA validation
Stack
- SystemVerilog
- UVM
- Verilog
- Python
- Perl
- FPGA
- Bluetooth
- Zigbee
- WLAN